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The continuous scaling of CMOS technology has progressed sufficiently to offer device performance suitable for RF applications at GHz frequencies. The current demonstration of transistors with gate lengths of 32 nm and fT s higher than 320 GHz suggests the trend will continue throughout this decade. Nevertheless, RF designs in CMOS face serious challenges as technology scaling continues. In particular, the quality of on-chip passive components is among the most pressing issues to overcome. As frequency increases the inductor s quality factor (Q) improves while the quality factor of capacitors and varactors degrade. In this book, a CMOS-compatible varactor with low tuning voltage is introduced and modeled in detail. The varactor can achieve a wide tuning range of relatively independent of supply voltage and its quality factor improves with technology scaling. On-chip RF filter implementation is another major difficulty in CMOS RF design. Due to the low Q of on-chip spiral inductors, filter loss becomes too large. To overcome the loss, a novel Q-enhancement scheme is presented along with RF filter implementation.
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